JPH0338742B2 - - Google Patents

Info

Publication number
JPH0338742B2
JPH0338742B2 JP56212459A JP21245981A JPH0338742B2 JP H0338742 B2 JPH0338742 B2 JP H0338742B2 JP 56212459 A JP56212459 A JP 56212459A JP 21245981 A JP21245981 A JP 21245981A JP H0338742 B2 JPH0338742 B2 JP H0338742B2
Authority
JP
Japan
Prior art keywords
groove
film
material film
semiconductor layer
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56212459A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58112342A (ja
Inventor
Shuichi Kameyama
Satoshi Shinozaki
Hiroshi Iwai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP56212459A priority Critical patent/JPS58112342A/ja
Priority to EP82107583A priority patent/EP0073025B1/en
Priority to DE8282107583T priority patent/DE3279874D1/de
Priority to US06/410,083 priority patent/US4532701A/en
Publication of JPS58112342A publication Critical patent/JPS58112342A/ja
Priority to US06/738,404 priority patent/US4615104A/en
Priority to US06/737,922 priority patent/US4615103A/en
Publication of JPH0338742B2 publication Critical patent/JPH0338742B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/763—Polycrystalline semiconductor regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
JP56212459A 1981-08-21 1981-12-25 半導体装置の製造方法 Granted JPS58112342A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP56212459A JPS58112342A (ja) 1981-12-25 1981-12-25 半導体装置の製造方法
EP82107583A EP0073025B1 (en) 1981-08-21 1982-08-19 Method of manufacturing dielectric isolation regions for a semiconductor device
DE8282107583T DE3279874D1 (en) 1981-08-21 1982-08-19 Method of manufacturing dielectric isolation regions for a semiconductor device
US06/410,083 US4532701A (en) 1981-08-21 1982-08-19 Method of manufacturing semiconductor device
US06/738,404 US4615104A (en) 1981-08-21 1985-05-28 Method of forming isolation regions containing conductive patterns therein
US06/737,922 US4615103A (en) 1981-08-21 1985-05-28 Method of forming isolation regions containing conductive patterns therein

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56212459A JPS58112342A (ja) 1981-12-25 1981-12-25 半導体装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP27986389A Division JPH02177330A (ja) 1989-10-30 1989-10-30 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58112342A JPS58112342A (ja) 1983-07-04
JPH0338742B2 true JPH0338742B2 (en]) 1991-06-11

Family

ID=16622975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56212459A Granted JPS58112342A (ja) 1981-08-21 1981-12-25 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58112342A (en])

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4385975A (en) * 1981-12-30 1983-05-31 International Business Machines Corp. Method of forming wide, deep dielectric filled isolation trenches in the surface of a silicon semiconductor substrate
JPH0660314U (ja) * 1993-02-02 1994-08-23 友親 上甲 刈払機
KR100515075B1 (ko) * 1998-06-30 2006-01-12 주식회사 하이닉스반도체 반도체소자의 매립배선 형성방법

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4238278A (en) * 1979-06-14 1980-12-09 International Business Machines Corporation Polycrystalline silicon oxidation method for making shallow and deep isolation trenches
JPS5615056U (en]) * 1979-07-12 1981-02-09

Also Published As

Publication number Publication date
JPS58112342A (ja) 1983-07-04

Similar Documents

Publication Publication Date Title
US4459325A (en) Semiconductor device and method for manufacturing the same
KR100227766B1 (ko) 반도체 장치 및 그 제조 방법
US4532701A (en) Method of manufacturing semiconductor device
US4551911A (en) Method for manufacturing semiconductor device
EP0083816B1 (en) Semiconductor device having an interconnection pattern
JPH0513566A (ja) 半導体装置の製造方法
US5488002A (en) Method for manufacturing self-aligned bipolar transistors using double diffusion
GB2179201A (en) Method for fabricating a semiconductor device
JPS6355780B2 (en])
JPH0340938B2 (en])
JPS58220444A (ja) 半導体装置の製造方法
JPH0338742B2 (en])
JPS6119111B2 (en])
KR900003616B1 (ko) 반도체장치의 제조방법
JPS60241261A (ja) 半導体装置およびその製造方法
JPH0223028B2 (en])
JPH0363220B2 (en])
JP2890550B2 (ja) 半導体装置の製造方法
JPH0574220B2 (en])
JPH0778833A (ja) バイポーラトランジスタとその製造方法
JP2774407B2 (ja) 半導体装置の製造方法
JPH0423828B2 (en])
JPS6129539B2 (en])
JPH02161750A (ja) 半導体装置の製造方法
JPH0831468B2 (ja) 半導体装置の製造方法